THE USE OF PARALLEL AND PIPELINE DIAGRAM COMPUTATION WHENDEVELOPING HARDWARE ORIENTED FILTERING IMAGE ALGORITHM

Abstract

Image processing task is the task which requires considerable practical implementation of digital and ADP equipment hardware and timing resources. When transferring data image information is inevitably subjected to systematic and accidental noise influence. It can happenduring registration process and can finishwith information display or information storage. Digital image filtering with the use of filtering method by sliding window is described in this paper. Array, pipeline and sequential structure comparing on the example of image processing by sliding window is given. Parallel and pipeline diagrams for pixelsbrightness computation are offered. Parallel and pipeline pixels brightness computation diagram can be used when developinghardware oriented filtering image algorithm. It can allow to reduce computation time of new brightness values and, respectively, to increase high-speed filtering device performance in general. The diagram is oriented on implementation with FPGA use and can be used for digital filter implementation and also for neurosimilar structures.Key words: image processing, image filtering.